ISO/IEC 18372:2004

Title

Language: EN Information technology - RapidIO TM interconnect specification

Abstract

Language: EN The RapidIO architecture was developed to address the need for a high-performance low pin count packet-switched system level interconnect to be used in a variety of applications as an open standard. The architecture is targeted toward networking, telecom, and high performance embedded applications. It is intended primarily as an intra-system interface, allowing chip-to-chip and board-to-board communications at Gigabyte per second performance levels. It provides a rich variety of features including high data bandwidth, low-latency capability and support for high-performance I/O devices, as well as providing globally shared memory, message passing, and software managed programming models. The electronic version of this International Standard can be downloaded from the ISO/IEC Information Technology Task Force (ITTF) website.

Language(s)
Language: EN
Edition
1.0
Date of issue
15.12.2004
ISO/IEC JTC 1/SC 25
ICS Codes
35.200
Publication number
18372
Preview

To use the preview feature, please enable JavaScript in your Browser


Price (excl. VAT)
€ 180,00 (Download and hardcopy)
Delivery format
postal download (399 Pages)

Warenkorb

Back

Legend

Document for download (PDF) PDF document (download version)
ZIP File for download ZIP file (download version)
Shipping item Paper (print version)/shipping item
Adobe DRM ePub File E-book (Adobe DRM ePub)
Storage medium Storage medium
Database Database
Bezugsart Online Viewing access (7-days available online)
Mandatory Standard according current regulation Mandatory Standard according current regulation

This website uses cookies. By continuing to use this website you are giving consent to cookies being used. For information on cookies, please look at our privacy statement.